Novel Tunneling Device Exhibiting Negative Differential Resistance and a Large Peak-to-Valley Current Ratio

Existing tunnel diodes have low peak-to-valley current ratios, limiting their applications in very large-scale integration (VLSI) circuits found in processors and memory chips. Researchers at Purdue University have developed a cross-coupled gated tunneling diode (XTD) that exhibits negative differential resistance while achieving a peak-to-valley current ratio (PVCR) that exceeds 10^5. In simulations, a data retention solution using 2 XTDs and an access transistor consumed 70x less standby power while taking up 8x less area than standard CMOS memory. This technology has applications in high density circuits, including static random-access memory (SRAM), and would be useful in organizations designing VLSI circuits or in silicon foundries.

Advantages

-Negative differential resistance

-Peak-to-valley current ratio greater than 10^5

-Significant reduction in area and standby power consumption

Applications

-VLSI Circuit Design

-SRAM

-Electrical Engineering

Technology Validation:

This technology has been validated through TCAD simulations that showed standby power consumption reduced by 70x while taking up 8x less area, as compared to CMOS SRAM.

Related Publications:

P. Wu, M. Li, B. Zhou, X. S. Hu and J. Appenzeller, "Cross-Coupled Gated Tunneling Diodes With Unprecedented PVCRs Enabling Compact SRAM Design—Part I: Device Concept," in IEEE Transactions on Electron Devices, vol. 69, no. 11, pp. 6078-6084, Nov. 2022, doi: 10.1109/TED.2022.3207139.

M. Li, P. Wu, B. Zhou, J. Appenzeller and X. S. Hu, "Cross-Coupled Gated Tunneling Diodes With Unprecedented PVCRs Enabling Compact SRAM Design—Part II: SRAM Circuit," in IEEE Transactions on Electron Devices, vol. 69, no. 11, pp. 6085-6088, Nov. 2022, doi: 10.1109/TED.2022.3207122.

TRL: 3

Intellectual Property:

Keywords: diode, Electrical Engineering, Memory, Micro & Nanotechnologies, microprocessor, RAM, semiconductor, Silicon, tunneling, VLSI